Part Number Hot Search : 
C1005JB B2010 AD996112 5558GS7F AM53C96 COMPO MPX4200A IDT74CB
Product Description
Full Text Search
 

To Download UMA1015M Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 INTEGRATED CIRCUITS
DATA SHEET
UMA1015M Low-power dual frequency synthesizer for radio communications
Product specification Supersedes data of October 1994 File under Integrated Circuits, IC03 1995 Jun 22
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
FEATURES * Two fully programmable RF dividers up to 1.1 GHz * Fully programmable reference divider up to 35 MHz * 2 : 1 or 1 : 1 ratio of selectable reference frequencies * Fast three-line serial bus interface * Adjustable phase comparator gain * Programmable out-of-lock indication for both loops * On-chip voltage doubler * Low current consumption from 3 V supply * Separate power-down mode for each synthesizer * Up to 4 open-drain output ports. APPLICATIONS * Cordless telephone * Hand-held mobile radio. QUICK REFERENCE DATA SYMBOL VDD1, VDD2 VCC VCCvd IDDO1 +IDDO2 + ICCO IDD1pd + IDD2pd + ICCpd IDD1pd fRFA, fRFB fXTALIN fpc(min) fpc(max) Tamb PARAMETER digital supply voltage charge pump supply voltage charge pump supply from voltage doubler operating supply current current in power-down mode per supply current in power-down mode from supply VDD RF input frequency for each synthesizer crystal input frequency minimum phase comparator frequency maximum phase comparator frequency operating ambient temperature fRF = 50 to 1100 MHz; fXTALIN = 3 to 35 MHz fRF = 50 to 1100 MHz; fXTALIN = 3 to 35 MHz synthesizer A 2.6 V VDD 5.5 V synthesizer B 2.6 V VDD 4.5 V synthesizer B 2.6 V VDD 5.0 V CONDITIONS VDD1 = VDD2 external supply; doubler disabled; VCC VDD doubler enabled both synthesizers ON; doubler disabled; VDD1 = VDD2 = 5.5 V doubler disabled; VDD1 = VDD2 = 5.5 V doubler enabled; VDD1 = VDD2 = 3 V MIN. 2.6 2.6 - - - - 50 3 - - -30 -30 0 - - TYP. GENERAL DESCRIPTION
UMA1015M
The UMA1015M is a low-power dual frequency synthesizer for radio communications which operates in the 50 to 1100 MHz frequency range. Each synthesizer consists of a fully programmable main divider, a phase and frequency detector and a charge pump. There is a fully programmable reference divider common to both synthesizers which operates up to 35 MHz. The device is programmed via a 3-wire serial bus which operates up to 10 MHz. The charge pump currents (gains) are fixed by an external resistance at pin 20 (ISET). The BiCMOS device is designed to operate from 2.6 V (3 Ni-Cd cells) to 5.5 V at low current. Digital supplies VDD1 and VDD2 must be at the same potential. The charge pump supply (VCC) can be provided by an external source or on-chip voltage doubler. VCC must be equal to or higher than VDD1. Each synthesizer can be powered-down independently via the serial bus to save current. It is also possible to power-down the device via the HPD input (pin 5).
MAX. 5.5 6.0 6.0 - - - 1100 35 - - +85 +85 +85
UNIT V V V mA mA mA MHz MHz kHz kHz C C C
2VDD1 - 0.6 9.6 0.01 0.15 - - 10 750 - - -
1995 Jun 22
2
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
ORDERING INFORMATION PACKAGE TYPE NUMBER PINS UMA1015M/C2 BLOCK DIAGRAM 20 PIN POSITION SSOP20 MATERIAL plastic
UMA1015M
CODE SOT266-1
Fig.1 Block diagram.
1995 Jun 22
3
B B B B
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
PINNING SYMBOL P1 P2 CPA VDD1 HPD RFA DGND fXTALIN P3 fXTALO CLK DATA E VDD2 RFB AGND CPB VCC P0/OOL ISET PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DESCRIPTION output Port 1 output Port 2 charge-pump output synthesizer A digital supply voltage 1 hardware power-down (input LOW = power-down) RF input synthesizer A digital ground common crystal frequency input from TCXO output Port 3 open-drain output of fXTAL signal programming bus clock input programming bus data input programming bus enable input (active LOW) digital supply voltage 2 RF input synthesizer B analog ground to charge pumps charge pump output synthesizer B analog supply to charge pump; external or voltage doubler output Port output 0/out-of-lock output regulator pin to set charge-pump currents
UMA1015M
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION Main dividers Each synthesizer has a fully programmable 17-bit main divider. The RF input drives a pre-amplifier to provide the clock to the first divider bit. The pre-amplifier has a high input impedance, dominated by pin and pad capacitance. The circuit operates with signal levels from below 50 mV (RMS) up to 250 mV (RMS), and at frequencies up to 1.1 GHz. The high frequency sections of the divider are implemented using bipolar transistors, while the slower section uses CMOS technology. The range of division ratios is 512 to 131071. Reference divider There is a common fully programmable 12-bit reference divider for the two synthesizers. The input fXTALIN drives a 1995 Jun 22 4
pre-amplifier to provide the clock input for the reference divider. This clock signal is also buffered and output on pin fXTALO (open drain). An extra divide-by-2 block allows a reference comparison frequency for synthesizer B to be half that of synthesizer A. This feature is selectable using the program bit SR. If the programmed reference divider ratio is R then the ratio for each synthesizer is as given in Table 1. The range for the division ratio R is 8 to 4095. Opposite edges of the divider output are used to drive the phase detectors to ensure that active edges arrive at the phase detectors of each synthesizer at different times. This minimizes the potential for interference between the charge pumps of each loop. The reference divider consists of CMOS devices operating beyond 35 MHz.
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
Table 1 SR 0 1 Phase comparators For each synthesizer, the outputs of the main and reference dividers drive a phase comparator where a charge pump produces phase error current pulses for integration in an external loop filter. The charge pump current is set by an external resistance RSET at pin ISET, where a temperature-independent voltage of 1.2 V is generated. RSET should be between 12 k and 60 k (to give an ISET of 100 A and 20 A respectively). The charge-pump current, ICP, can be programmed to be either (12 x ISET) or (24 x ISET) with the maximum being 2.4 mA. The dead zone, caused by finite switching of current pulses, is cancelled by an internal delay in the phase detector thus giving improved linearity. The charge pump has a separate supply, VCC, which helps to reduce the interference on the charge pump output from other parts of the circuit. Also, VCC can be higher than VDD1 if a wider range on the VCO input is required. VCC must not be less than VDD1. Voltage doubler If required, there is a voltage doubler on-chip to supply the charge pumps at a higher level than the nominal available supply. The doubler operates from the digital supply VDD1, and is internally limited to a maximum output of 6 V. An external capacitor is required on pin VCC for smoothing, the capacitor required to develop the extra voltage is integrated on-chip. To minimize the noise being introduced to the charge pump output from the voltage doubler, the doubler clock is suppressed (provided both loops are in-lock) for the short time that the charge pumps are active. The doubler clock (RF/64) is derived from whichever main divider is operating (synthesizer A has priority). While both synthesizers are powered down (and the doubler is enabled), the doubler clock is supplied by a low-current internal oscillator. The doubler can be disabled by programming the bit VDON to logic 0, in order to allow an external charge pump supply to be used. Out-of-lock indication/output ports There is a lock detector on-chip for each synthesizer. The lock condition of each, or both loops, is output via an open-drain transistor which drives the pin P0/OOL (when out-of-lock, the transistor is turned on and therefore the Synthesizer ratio of reference divider SYNTHESIZER A R R SYNTHESIZER B R 2R
UMA1015M
output is forced LOW). The lock condition output is software selectable (see Table 4). An out-of-lock condition is flagged when the phase error is greater than T00L, the value of which is approximately equal to 80 cycles of the relevant RF input. The out-of-lock flag is only released after 8 consecutive reference cycles where the phase error is less than T00L. The out-of-lock function can be disabled, via the serial bus, and the pin P0/OOL can be used as an output port. Three other port outputs P1, P2 and P3 (open-drain transistors) are also available. Serial programming bus A simple 3-line unidirectional serial bus is used to program the circuit. The 3 lines are DATA, CLK and E (enable). The data sent to the device is loaded in bursts framed by E. Programming clock edges are ignored until E goes active LOW. The programmed information is loaded into the addressed latch when E returns inactive HIGH. This is allowed when CLK is in either state without causing any consequences to the register data. Only the last 21 bits serially clocked into the device are retained within the programming register. Additional leading bits are ignored, and no check is made on the number of clock pulses. The fully static CMOS design uses virtually no current when the bus is inactive. It can always capture new programming data even during power-down of both synthesizers. However when either synthesizer A or synthesizer B or both are powered-on, the presence of a TCXO signal is required at pin 8 (fXTALIN) for correct programming. Data format Data is entered with the most significant bit first. The leading bits make up the data field, while the trailing four bits are an address field. The address bits are decoded on the rising edge of E. This produces an internal load pulse to store the data in the addressed latch. To ensure that data is correctly loaded on first power-up, E should be held LOW and only taken HIGH after having programmed an appropriate register. To avoid erroneous divider ratios, the pulse is inhibited during the period when data is read by the frequency dividers. This condition is guaranteed by respecting a minimum E pulse width after data transfer. The data format and register bit allocations are shown in Table 2.
1995 Jun 22
5
1995 Jun 22 6
Philips Semiconductors
Table 2 FIRST p1 dt16 X MA16 0 MB16
Bit allocation
Low-power dual frequency synthesizer for radio communications
REGISTER BIT ALLOCATION p2 X 0 p3 p4 p5 OLA SR p6 OLB R11 p7 CRA p8 CRB p9 X p10 X p11 p12 p13 dt4 sPDA sPDB P3 p14 dt3 P2 p15 dt2 P1 p16 dt1 X p17 dt0 X MA0 R0 MB0 0 0 0 0 0 p18 p19 0 1 1 1 0 p20 0 0 0 1 0 dt15 dt14 dt13 dt12 DATA FIELD SYNTHESIZER A MAIN DIVIDER COEFFICIENT 0 0 REFERENCE DIVIDER COEFFICIENT RESERVED FOR TEST(1) SYNTHESIZER B MAIN DIVIDER COEFFICIENT ADDRESS
LAST p21 1 0 1 0 0
VDON PO
Note 1. The test register should not be programmed with any other values except all zeros for normal operation. Table 3 Bit allocation description DESCRIPTION software power-down for synthesizers A and B (0 = power-down) bits output to pins 1, 2, 9 and 19 (1 = high impedance) voltage doubler enable (1 = doubler enabled) out-of-lock select; selects signal output to pin 19 (see Table 4) charge pump A/B current to ISET ratio select (see Table 5) reference frequency ratio select (see Table 6) Out-of-lock select OLA 0 0 1 1 Table 5 OLB 0 1 0 1 P0 lock status of loop B; OOLB lock status of loop A; OOLA logic OR function of loops A and B OUTPUT AT PIN 19
SYMBOL sPDA, sPDB P3, P2, P1 and P0 VDON OLA, OLB CRA, CRB SR Table 4
Product specification
UMA1015M
Charge pump current ratio CURRENT AT PUMP ICP = 12 x ISET ICP = 24 x ISET
Table 6
Reference division ratio SYNTHESIZER A R R SYNTHESIZER B R 2R
CRA/CRB 0 1
SR 0 1
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
Power-down modes The device can be powered down either via pin HPD (active LOW = power-down) or via the serial bus (bits SPDA and SPDB, logic 0 = power-down). The synthesizers are powered up when both hardware and software Power-down signals are at logic 1. When only one synthesizer is powered down, the functions common to both will be maintained. When both synthesizers are
UMA1015M
switched off, only the voltage doubler (if enabled) will remain active drawing a reduced current. An internal oscillator will drive the doubler in this situation. If both synthesizers have been in a power-down condition, then when one or both synthesizers are reactivated, the reference and main dividers restart in such a way as to avoid large random phase errors at the phase comparator.
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDD1, VDD2 VCC VCC-DD Vn V3, 17 VGND Tstg Tamb HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take normal precautions appropriate to handling MOS devices. PARAMETER DC range of digital power supply voltage with respect to DGND difference in voltage between VCC and VDD1, VDD2 DC voltage at pins 1, 2, 5, 6, 8 to 15, 19 and 20 with respect to DGND DC voltage at pins 3 and 17 with respect to AGND difference in voltage between AGND and DGND (these pins should be connected together) storage temperature operating ambient temperature MIN. -0.3 MAX. +6.0 +6.0 +6.0 VDD1 + 0.3 VCC + 0.3 +0.3 +125 +85 V V V V V V C C UNIT
DC charge pump supply voltage with respect to AGND -0.3 -0.3 -0.3 -0.3 -0.3 -55 -30
1995 Jun 22
7
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
CHARACTERISTICS VDD1 = VDD2 = 2.6 to 5.5 V; VCC = 2.6 to 6.0 V; Tamb = 25 C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP.
UMA1015M
MAX.
UNIT
Supply; (VDD1, VDD2 and VCC) voltage doubler disabled, external supply on VCC VDD1, VDD2 digital supply voltage IDD1 + IDD2 total digital supply current from VDD1 and VDD2 VDD1 = VDD2 fXTAL = 12.8 MHz; both synthesizers on; VDD1 = VDD2 = 3 V fXTAL = 12.8 MHz; both synthesizers on; VDD1 = VDD2 = 5.5 V IDDpda, IDDpdb total digital supply current from VDD1 and VDD2 with one synthesizer in power-down mode fXTAL = 12.8 MHz; one synthesizer powered down; VDD1 = VDD2 = 3 V fXTAL = 12.8 MHz; one synthesizer powered down; VDD1 = VDD2 = 5.5 V both synthesizers powered down; VHPD = 0 V VCC VDD both synthesizers on and in lock; fref = 12.5 kHz both synthesizers powered down 2.6 - - 8.5 5.5 - V mA
-
-
12.5
mA
-
5.5
-
mA
-
-
7.5
mA
IDDpd VCC ICC ICCpd
digital supply current in power-down mode charge pump supply voltage charge pump supply current charge pump supply current in power-down mode
- 2.6 - -
- - - -
60 6.0 25 25
A V A A
Voltage doubler enabled IDD total digital supply current from VDD1 and VDD2 fXTAL = 12.8 MHz; both - synthesizers on and in lock; VDD1 = 3 V; fdoubler = 16 MHz - 8.5 12 mA
IDDpd
total digital supply current both synthesizers powered in power-down mode from down; VDD1 = 3 V; VDD1 and VDD2 VHPD = 0 V charge pump supply voltage DC current drawn from VCC = 50 A
0.25
0.4
mA
VCCvd
2VDD1 - 1.2 2VDD1 - 0.6 6.0
V
1995 Jun 22
8
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
SYMBOL PARAMETER CONDITIONS MIN. - - TYP.
UMA1015M
MAX.
UNIT
RF main divider input; RFA and RFB fRF VRF(rms) RF input frequency RF input signal voltage (RMS value; AC coupled) Rs = 50 ; VDD1 = VDD2 = 2.6 to 3.5 V; fRF = 400 to 1100 MHz Rs = 50 ; VDD1 = VDD2 = 3.5 to 5.5 V; fRF = 400 to 1100 MHz Rs = 50 ; VDD1 = VDD2 = 2.6 to 5.5 V; fRF = 50 to 400 MHz ZI CI Rpm input impedance (real part) input capacitance principle main divider ratio fRF = 1 GHz; indicative, not tested indicative, not tested 50 50 1100 250 MHz mV
100
-
250
mV
150
-
400
mV
- - 512
300 1 - - - 10 1 -
- - 131071
pF
Reference divider input; fXTALIN fXTALIN reference input frequency from crystal 3 100 fXTALIN = 12.8 MHz; indicative, not tested indicative, not tested - - 8 - 35 500 - - 4095 - MHz mV k pF
VXTALIN(rms) sinusoidal input voltage (RMS value) ZI CI Rrd input impedance (real part) input capacitance reference divider ratio
Charge pump current setting resistor input; ISET VSET ICP voltage output on ISET charge pump sink or source current RSET = 12 to 60 k RSET = 15 k; CRA/CRB = logic 1; Icp = ISET x 24; Vcp = 0.4 V to VCC - 0.5 V RSET = 15 k; CRA/CRB = logic 0; Icp = ISET x 12; Vcp = 0.4 V to VCC - 0.5 V ILI charge pump off leakage current Vcp = 0.5VCC 1.2 V
Charge pump outputs; CPA and CPB 1.4 1.9 2.4 mA
0.7
0.96
1.2
mA
-5
-
+5
nA
1995 Jun 22
9
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
SYMBOL PARAMETER CONDITIONS MIN. - - - 1 - TYP.
UMA1015M
MAX.
UNIT
Logic input signal levels; DATA, CLK, E and HPD VIH VIL Ibias CI HIGH level input voltage LOW level input voltage input bias currents input capacitance at logic 1 at logic 0 at logic 1 or logic 0 indicative, not tested 0.7VDD1 -0.3 -5 - - VDD1 + 0.3 0.3VDD1 +5 - V V A pF
Port outputs/Out-of-lock; P0/OOL, P1, P2, P3 and fXTALO - open drain outputs VOL LOW level output voltage Isink = 0.4 mA 0.4 V
SERIAL TIMING CHARACTERISTICS VDD1 = 3 V; Tamb = 25 C unless otherwise specified. SYMBOL Serial programming clock; CLK tr, tf tcy tSTART tEND tW tSU;E tSU;DAT tHD;DAT input rise and fall times clock period - 100 10 - - - - - - - 40 - - - - - - - ns ns PARAMETER MIN. TYP. MAX. UNIT
Enable programming; E delay to rising clock edge delay from last falling clock edge minimum inactive pulse width enable set-up time to next clock edge 40 -20 4000 20 ns ns ns ns
Register serial input data; DATA input data to clock set-up time input data to clock hold time 20 20 ns ns
Fig.3 Serial bus timing diagram.
1995 Jun 22
10
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
TYPICAL PERFORMANCE CHARACTERISTICS
UMA1015M
(1) Tamb = +85 C. (2) Tamb = +25 C. (3) Tamb = -30 C.
Fig.4 IDD as a function of VDD with both synthesizers on and voltage doubler disabled.
RSET = 15 k; CRA = 1. (1) VCC = 2.7 V. (2) VCC = 6.0 V.
Fig.5 Charge pump current as a function of CPA voltage.
1995 Jun 22
11
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
UMA1015M
RSET = 15 k; CRA = 1. (1) Tamb = +85 C. (2) Tamb = +25 C. (3) Tamb = -30 C.
Fig.6 Charge pump 3-state current as a function of CPA voltage.
fXTALIN externally terminated by 50 load; AC-coupled. (1) VDD = 5.5 V. (2) VDD = 2.7 V.
Fig.7 Crystal input sensitivity as a function of input frequency.
1995 Jun 22
12
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
UMA1015M
fXTALIN externally terminated by 50 load; AC-coupled. (1) Tamb = -30 C. (2) Tamb = +25 C. (3) Tamb = +85 C.
Fig.8 Crystal input sensitivity as a function of input frequency with VDD = 5.5 V.
RF input externally terminated by 50 load; AC-coupled. (1) VDD = 5.5 V. (2) VDD = 2.7 V.
Fig.9 RF input sensitivity as a function of input frequency.
1995 Jun 22
13
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
UMA1015M
RF input externally terminated by 50 load; AC-coupled. (1) Tamb = -30 C. (2) Tamb = +25 C. (3) Tamb = +85 C.
Fig.10 RF input sensitivity as a function of input frequency with VDD = 5.5 V.
(1) Tamb = -30 C. (2) Tamb = +25 C. (3) Tamb = +85 C.
Fig.11 Typical charge pump supply voltage as a function of VDD voltage with voltage doubler enabled. 1995 Jun 22 14
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
UMA1015M
handbook, full pagewidth
1 0.5 2
0.2
5 10
+j 0 -j 3 1 2 5 10 0.2 0.5 1 5 10 4
0.2
0.5 (1) (2) (3) (4) 68.316 , -92.457 at 1.1 GHz. 85.914 , -152.08 at 800 MHz. 102.83 , -354.66 at 400 MHz. 853.75 , -2.7735 k at 50 MHz. 1
2
MBE019
Fig.12 Input impedance as a function of input frequency; synthesizer A.
handbook, full pagewidth
1 0.5 2
0.2
5 10
+j 0 -j 3 2 1 0.2 5 10 0.2 0.5 1 5 10 4
0.5 (1) (2) (3) (4) 69.293 , -78.027 at 1.1 GHz. 100.2 , -148.37 at 800 MHz. 128.22 , -378.81 at 400 MHz. 674.25 , -3.06 k at 50 MHz. 1
2
MBE020
Fig.13 Input impedance as a function of input frequency; synthesizer B.
1995 Jun 22
15
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
APPLICATION INFORMATION
UMA1015M
Fig.14 Typical application block diagram.
1995 Jun 22
16
Transmit frequency = 959 MHz. Receive frequency = 914 MHz. 1st IF = 58.1125 MHz. 2nd IF = 455 MHz. VCO sensitivity = 2 MHz/V. Channel spacing = 12.5 kHz. Charge pump gain (CPA = CPB) = 1 mA/cycle.
BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB
B BBBBBBBBBBB BBBBBBBBBBB BBBBBBBBBBB BBBBBBBBB BBBBBBBBBBB BBBBBBBBBBB BBBBBBBBBBB B BBBBBBBBBBB BBBBBBBBBBB
Philips Semiconductors
Low-power dual frequency synthesizer for radio communications
Product specification
UMA1015M
Fig.15 Typical CT1 application.
BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB BBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBBB
BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB BBBBBBBBBB
1995 Jun 22
17
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
PACKAGE OUTLINE SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
UMA1015M
SOT266-1
D
E
A X
c y HE vM A
Z
20
11
Q A2 pin 1 index A1 (A 3) Lp L A
1
e bp
10
detail X wM
0
2.5 scale
5 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max. 1.5 A1 0.15 0 A2 1.4 1.2 A3 0.25 bp 0.32 0.20 c 0.20 0.13 D (1) 6.6 6.4 E (1) 4.5 4.3 e 0.65 HE 6.6 6.2 L 1.0 Lp 0.75 0.45 Q 0.65 0.45 v 0.2 w 0.13 y 0.1 Z (1) 0.48 0.18 10 0o
o
Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION SOT266-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION
ISSUE DATE 90-04-05 95-02-25
1995 Jun 22
18
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
SOLDERING SO or SSOP Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these cases reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Reflow soldering Reflow soldering techniques are suitable for all SO and SSOP packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. Wave soldering SO Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. SSOP
UMA1015M
Wave soldering is not recommended for SSOP packages. This is because of the likelihood of solder bridging due to closely-spaced leads and the possibility of incomplete solder penetration in multi-lead devices. If wave soldering cannot be avoided, the following conditions must be observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow and must incorporate solder thieves at the downstream end. Even with these conditions, only consider wave soldering SSOP packages that have a body width of 4.4 mm, that is SSOP16 (SOT369-1) or SSOP20 (SOT266-1). METHOD (SO OR SSOP) During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Repairing soldered joints Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated G, all other leads can be soldered in one operation within 2 to 5 seconds at 270 to 320 C.
1995 Jun 22
19
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
UMA1015M
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1995 Jun 22
20
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
NOTES
UMA1015M
1995 Jun 22
21
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
NOTES
UMA1015M
1995 Jun 22
22
Philips Semiconductors
Product specification
Low-power dual frequency synthesizer for radio communications
NOTES
UMA1015M
1995 Jun 22
23
Philips Semiconductors - a worldwide company
Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428) BUENOS AIRES, Tel. (541)786 7633, Fax. (541)786 9367 Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. (02)805 4455, Fax. (02)805 4466 Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213, Tel. (01)60 101-1236, Fax. (01)60 101-1211 Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands, Tel. (31)40 783 749, Fax. (31)40 788 399 Brazil: Rua do Rocio 220 - 5th floor, Suite 51, CEP: 04552-903-SAO PAULO-SP, Brazil. P.O. Box 7383 (01064-970), Tel. (011)821-2333, Fax. (011)829-1849 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS: Tel. (800) 234-7381, Fax. (708) 296-8556 Chile: Av. Santa Maria 0760, SANTIAGO, Tel. (02)773 816, Fax. (02)777 6730 Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17, 77621 BOGOTA, Tel. (571)249 7624/(571)217 4609, Fax. (571)217 4549 Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. (032)88 2636, Fax. (031)57 1949 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. (358)0-615 800, Fax. (358)0-61580 920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. (01)4099 6161, Fax. (01)4099 6427 Germany: P.O. Box 10 63 23, 20043 HAMBURG, Tel. (040)3296-0, Fax. (040)3296 213. Greece: No. 15, 25th March Street, GR 17778 TAVROS, Tel. (01)4894 339/4894 911, Fax. (01)4814 240 Hong Kong: PHILIPS HONG KONG Ltd., 15/F Philips Ind. Bldg., 24-28 Kung Yip St., KWAI CHUNG, N.T., Tel. (852)424 5121, Fax. (852)480 6960/480 6009 India: Philips INDIA Ltd, Shivsagar Estate, A Block , Dr. Annie Besant Rd. Worli, Bombay 400 018 Tel. (022)4938 541, Fax. (022)4938 722 Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4, P.O. Box 4252, JAKARTA 12950, Tel. (021)5201 122, Fax. (021)5205 189 Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. (01)7640 000, Fax. (01)7640 200 Italy: PHILIPS SEMICONDUCTORS S.r.l., Piazza IV Novembre 3, 20124 MILANO, Tel. (0039)2 6752 2531, Fax. (0039)2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2 -chome, Minato-ku, TOKYO 108, Tel. (03)3740 5130, Fax. (03)3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. (02)709-1412, Fax. (02)709-1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. (03)750 5214, Fax. (03)757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905, Tel. 9-5(800)234-7381, Fax. (708)296-8556 Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB Tel. (040)783749, Fax. (040)788399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. (09)849-4160, Fax. (09)849-7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. (022)74 8000, Fax. (022)74 8341 Pakistan: Philips Electrical Industries of Pakistan Ltd., Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton, KARACHI 75600, Tel. (021)587 4641-49, Fax. (021)577035/5874546 Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc, 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. (02)810 0161, Fax. (02)817 3474 Portugal: PHILIPS PORTUGUESA, S.A., Rua dr. Antonio Loureiro Borges 5, Arquiparque - Miraflores, Apartado 300, 2795 LINDA-A-VELHA, Tel. (01)4163160/4163333, Fax. (01)4163174/4163366 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. (65)350 2000, Fax. (65)251 6500 South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430, Johannesburg 2000, Tel. (011)470-5911, Fax. (011)470-5494. Spain: Balmes 22, 08007 BARCELONA, Tel. (03)301 6312, Fax. (03)301 42 43 Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM, Tel. (0)8-632 2000, Fax. (0)8-632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. (01)488 2211, Fax. (01)481 77 30 Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978, TAIPEI 100, Tel. (02)388 7666, Fax. (02)382 4382 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, Bangkok 10260, THAILAND, Tel. (662)398-0141, Fax. (662)398-3319 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. (0 212)279 27 70, Fax. (0212)282 67 07 United Kingdom: Philips Semiconductors LTD., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. (0181)730-5000, Fax. (0181)754-8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. (800)234-7381, Fax. (708)296-8556 Uruguay: Coronel Mora 433, MONTEVIDEO, Tel. (02)70-4044, Fax. (02)92 0601
Internet: http://www.semiconductors.philips.com/ps/ For all other countries apply to: Philips Semiconductors, International Marketing and Sales, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Telex 35000 phtcnl, Fax. +31-40-724825 SCD40 (c) Philips Electronics N.V. 1995
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
413061/1500/03/pp24 Document order number: Date of release: 1995 Jun 22 9397 750 00177


▲Up To Search▲   

 
Price & Availability of UMA1015M

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X